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Publications

Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

[read paper]

[watch presentation]

Improving Effectiveness and Productivity of Microprocessor Verification

[read paper]

Academic partners

MAVERIC @ NU

Maveric is the Micro Architecture Verification Center located at Nazarbayev University. This center is lead by our CEO Dr. Kabylkas. It is at the forefront of advancing hardware verification through pioneering R&D initiatives. 


[visit website]

MASC

MASC is Micro Architecture Santa Cruz. The group  is at the forefront of innovative tools for hardware and microprocessor design, introducing the "livehd" compiler to enhance productivity and the next-gen architectural simulator "ESESC."  


[visit website]

webinars

Magic VLSI Tutorial (part 1), Installation and Technology

Step by step tutorial on how to install Magic VLSI tool and install technology files. We are also having a discussion on what is scalable design and what are the technology files. 


[watch on YouTube]

Magic VLSI Tutorial (part 2), Laying out CMOS inverter

This tutorial provides a detailed, step-by-step guide to laying out a simple CMOS inverter using Magic VLSI. From the cross-sectional view of the inverter, we layout it in Magic. 


[watch on YouTube]

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